Job Description

• Design one or several of the following high performance analog circuit:
  • high speed and low power ADC
  • high linearity and low noise amplifier
  • high linearity and low noise analog filter
  • high performance PLL
  • low noise OSC
  • high speed SERDES
  • inductive or capacitive base power converter
  • low noise LDO
  • high performance temperature sensor
  • low noise and high accuracy voltage/current reference etc
• Plan and perform silicon engineering validation of the responsible analog circuit.
• Perform silicon debug.
• Work with test engineer to plan and determine ATE test plan for analog circuits.

Job Requirements

• Master degree in electrical engineering with 3 years of experience or more, PhD in electrical engineering with 1 years of experience or more. 
• Good experience in some area of analog design in
• Solid understanding of analog design fundamentals including device physics, analog circuit analysis, sampling theory, control theory and good understanding of communication theory.
• Strong analytical skill and familiar with underline theory for both time domain analysis and frequency domain analysis
• Solid understanding and experience in key analog layout considerations such as device matching, parasitic, noise coupling, floor planning, sensitive signal routing, current density and reliability considerations.
• Familiar with both schematic and layout tool, methodologies, flow and CAD tools such as SPICE, Cadence virtuoso, Spectre, PCELL layout, Calibre physical verification.
• Good team work, responsible, good communication skill.

We regret that only shortlisted candidates will be notified.

GMP Technologies (S) Pte Ltd   |   EA Licence: 11C3793   | EA Personnel:  Lim Zi Cheng  |   Registration No:  R2089949